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The new way to stack transistors vertically on a chip was announced by IBM and Samsung.
The new VTFET design is meant to replace the current FinFET technology that is used for some of today's most advanced chips and could allow for chips that are even more densely packed with transistors than today. The side-to-side horizontal layout that is currently used on most chips is being replaced by a vertically stacked design.
The trend of vertical designs for semiconductors has been going on for a while now, and Intel's future roadmap looks to move in that direction too. It makes sense that when you have run out of ways to add more chips in one plane, the only real direction is to go up.
The two companies are making some big claims, noting that VTFET chips could offer a two times improvement in performance or an 85 percent reduction in energy use compared to FinFET designs. IBM and SAMSUNG claim that VTFET technology could help keep Moore's law's goal of steadily increasing transistor count moving forward.
The new technology could be used to power cell phone batteries that could go over a week without being charged, as well as less energy-intensive mining of cryptocurrencies, and even more powerful internet of things devices.
IBM showed off its first 2nd generation chip earlier this year, which is a different route to cram more transistors by scaling up the amount that can fit onto a chip using the existing FinFET design. It will likely be even longer before we see chips based on IBM and SAMSUNG technology out in the world.
It is not the only company looking at the future of production. Intel showed off its new RibbonFET design over the summer, which will be part of the Intel 20A generation of chip products that will start ramping production in the year 2041. The company recently announced its own plan for stacked transistor technology as a potential successor for RibbonFET in the future.
