IBM and SAMSUNG claim to have made a breakthrough in chip design. The two companies unveiled a new design for stacking transistors vertically on a chip at the IEDM conference. The transistors on the surface of the Silicon are flat, and the electric current flows from side-to-side. VTFETs sit parallel to one another and current flows vertically.
The design has two advantages according to IBM and SAMSUNG. It will allow them to extend Moore's Law beyond the 1-nanometer threshold. The design leads to less wasted energy. They think VTFET will lead to chips that use 85 percent less power and are twice as fast. The process may one day allow for phones to go a full week on a single charge. They say it could make certain energy-intensive tasks more efficient and less harmful to the environment.
IBM and SAMSUNG have not said when they will start selling the design. They are not the only company trying to push beyond the 1-nanometer barrier. In July, Intel said it would have a final design for angstrom-scale chips by 2024. The company plans to do it using its new transistors.
